Chemical vapor deposition (CVD) of cubic silicon carbide SiC

ABSTRACT

A method for chemical vapor deposition (CVD) of cubic Silicon Carbide (SiC) comprising the steps of etching silicon substrates having one mechanically polished face; depositing a thin buffer layer of cubic SiC formed by reaction between a heated Si substrate and a H 2  C 3  H 8  gas mixture; and depositing SiC on the buffer layer at high temperature using H 2  +C 3  H 8  +SiH 4  mixture.

BACKGROUND OF THE INVENTION

The present invention relates to the growth of cubic silicon carbide crystals. More specifically, the present invention relates to the growth of cubic silicon carbide by Chemical Vapor Deposition (CVD).

A great need has developed to produce high-temperature electronic devices for advanced turbine engines, geothermal wells, and other applications. Cubic silicon carbide (SiC) is considered an excellent candidate for use as a high temperature electronic material because of its large band gap, good carrier mobility and excellent physical stability. A primary reason, though, why development of cubic SiC has not been carried further is the lack of a reproducible process for producing the single crystal substrates necessary for device fabrication.

A method that attempts to remedy this problem is presented by S. Nishino, J. A. Powell, and H. A. Will, "Production of large-area single-crystal wafers of cubic SiC for semiconductor devices," Appl. Phys. Lett. Vol. 42, No. 5, Pages 460-462, March 1983. However, the method of Nishino et al. results in cubic SiC crystals that are not of a high purity and have poor duplicability. (See A. Addamiano and J. A. Sprague, "Buffer-layer technique for the growth of single crystal SiC on Si," Appl. Phys. Lett. Vol. 44, No. 5, March 1984).

There are several reasons why the method of Nishino et al. is not adequate. Nishino et al. teach etching of the Si substrates, on which the cubic SiC crystals are grown in the apparatus used for the CVD, using hydrogen chloride (HCl) vapor at a temperature of about 1200° C. Etching of the substrates in the CVD reactor with hot HCl vapor results in considerable erosion of the graphite susceptor housing the Si substrates. This, in turn, results in random deposition of carbon particles on the Si substrates, with the consequence that there is poor duplicability of the results and impurities are introduced into the cubic SiC as it is grown. Another reason the method of Nishino et al. is not adequate is because in the formation of a buffer layer of cubic SiC on the Si substrate Nishino et al. teach mixing H₂ and C₃ H₈ at room temperature, flowing the mixture over the Si substrates at room temperature, then bringing the temperature to 1360° C. and maintaining the temperature for about 1 minute, followed by cooling. The buffer layers formed by this technique are stated to be mainly polycrystalline cubic SiC, by Nishino et al., supra. This is because C₃ H₈ is present throughout the heating step causing different growth conditions for cubic SiC that forms as the temperature is raised from room temperature to 1360° C.

Nishino et al. also teach to carry out CVD on the buffer layers at a temperature of about 1360° C. This temperature is not the ideal temperature for formation of perfect cubic single crystal layers.

SUMMARY OF THE INVENTION

Accordingly, one object of the present invention is to provide a novel method for the production of cubic SiC for high temperature electronic devices.

Another object of the present invention is to provide a novel method for the production of highly pure, single crystal cubic SiC that is duplicable.

Another object of the present invention is to provide a novel method for the production of large-area single-crystal wafers of cubic SiC.

These and other objects of the present invention can be achieved by a method for producing large-area cubic SiC wafers comprising the steps of wet-etching an Si substrate for 10-60 seconds; heating the Si substrate to between 1370° C. and 1405° C. in H₂ gas; exposing the Si substrate to C₃ H₈ for 5-30 seconds, after temperature equilibrium in the heating step has been reached, to form a buffer layer of single crystal cubic SiC on the Si substrate, the amount of C₃ H₈ being no greater than 1 percent by volume of the H₂ gas; quenching the Si substrate having a cubic SiC buffer layer in H₂ to room temperature; heating the Si substrate with the SiC buffer layer to between 1370° C. and 1405° C. in H₂ gas; exposing the Si substrate having the buffer layer to C₃ H₈ and SiH₄, after thermal equilibrium has been reached for 0.25 to 5 hours to make a thicker layer of cubic SiC, the amount of C₃ H₈ and SiH₄ each being no greater than 1 percent by volume of the H₂ gas; quenching the Si substrate having the thicker layer of SiC in H₂ gas to room temperature.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawing, wherein:

FIG. 1 is a side view of the apparatus for cubic SiC growth via the CVD process.

DESCRIPTION OF PREFERRED EMBODIMENTS

Referring now to the drawing, wherein like reference numerals designate identical or corresponding parts throughout the several views, and more particularly to FIG. 1 thereof, there is shown an Si wafer (16) of structure (100), e.g., for the preparation of a preform 10 comprised of a layer of cubic SiC 18 deposited atop said highly pure wafer of Si 16. The Si layer 16 during the preparation of the perform is rested atop a graphite susceptor 20 located inside a fused quartz tube 12 and surrounded by an induction coil 15. The induction coil 15 raises the temperature of the graphite susceptor near the Si wafer to about 1400° C. causing a gas mixture that has been introduced upstream into the tube 12, to chemically react and deposit the layer of cubic SiC 18 on the Si wafer 16.

More specifically, CVD is begun by wet etching the silicon substrate prior to its insertion in the reactor 12 followed by rinsing in de-ionized water and drying. The etchant used is a mixture of nitric, hydroflouric and acetic acid usually in the volume ratio 5:3:3, respectively. The etchant is used at room temperature, and the etching time is 10-60 seconds, and preferably 30 seconds.

After the etching process is completed, the Si wafer 16 is placed atop a graphite susceptor 20 located inside a fused quartz tube 12. The susceptor 20 is raised at one edge by post 25 so as little of the susceptor 20 as possible is touching the tube 12. This susceptor 20 is propped up to minimize heat loss by conduction through the tube 12 since the tube 12 is cooler than its interior and acts as a heat sink.

When the Si wafer is in place on the susceptor 20 a stream of pure hydrogen (H₂) gas is introduced into the interior of tube 12 housing the Si wafer. The induction coil 15 is turned on and the Si wafer 16 and the area therearound is brought to between 1370° C. and 1405° C. After thermal equilibrium is established in the tube 12, propane gas, C₃ H₈, is added to the H₂ stream. The C₃ H₈ added to the H₂ stream should be no greater than 1 percent by volume of the H₂ stream. The inclusion of C₃ H₈ in the H₂ stream is for 5-30 seconds and preferably 15 seconds, followed by exclusion of the C₃ H₈ and quenching to room temperature of the Si wafer 16 in pure H₂. While the C₃ H₈ is present in the tube 12, the carbon in the C₃ H₈ chemically reacts with the Si wafer 16 to form SiC according to the following equations:

    C.sub.3 H.sub.8 =3C+4H.sub.2                               (I)

    3C+3Si=3SiC                                                (II).

At the temperature of between 1370° C. and 1405° C., the SiC that forms is cubic and single crystal. Care should be taken to avoid going higher than 1405° C. because hexagonal, 2H SiC crystals form, or lower than 1370° C. because crystal quality becomes very poor.

After quenching, the Si substrate now supporting the SiC buffer layer is re-heated to between 1370° C. and 1405° C. in pure H₂ gas. Again, thermal equilibrium is allowed to occur after which time silane (SiH₄) and propane are introduced into the H₂ that is flowing past the Si substrate with the SiC buffer layer. The amount of SiH₄ in the H₂ should be 1% by volume of the H₂, and the amount of C₃ H₈ in the H₂ should be 1% volume of the H₂. The presence of SiH₄ and C₃ H₈ is continued for as long as desired, usually between 0.25 and 5 hours, depending on how thick a cubic SiC layer is wanted. For instance, at 1400° C., the growth rate of cubic SiC on the buffer layer is about 4 m/hr and is large enough to obtain cubic SiC layers of the thickness needed for device fabrication in less than an hour. The presence of C₃ H₈ and SiH₄ in the gas flowing around the Si substrate is discontinued after the desired time has elapsed. The Si substrate with the cubic SiC layer is then quenched in H₂ gas to room temperature. It should be noted that a higher temperature during the CVD process favors formation of more perfect cubic single crystal layers.

A preferred embodiment of many possible embodiments, requires the CVD process to take place in a horizontal, water cooled, rf induction-heated quartz-tube reactor 12 with an internal diameter of 40 mm. An open 35-mm-i.d. quartz liner 33 contains the susceptor 20. The susceptor is machined from high-density, isotropic, high-purity graphite. Prior to the susceptor's first use, it is coated with SiC. The Si substrate 16 rests within a 0.25 mm deep cavity (not shown) in the susceptor 20. The substrate 16 is often (100)-oriented P-type Si, with resistivity of about 150 ohm-cm, measuring 12 mm×25 mm×0.38 mm. The substrate 16 is heated to 1400° C. with a flow of 0.6 liters per minute of H₂ passing around the substrate 16. At thermal equilibrium 0.2 milliliters per minute of C₃ H₈ is added to the flow of H₂ for 15 seconds to form the buffer layer, after which time, the C₃ H₈ flow is discontinued and the substrate 16 is quenched to room temperature in the H₂ gas that has continued to flow. The cubic SiC buffer layer that forms is about 300 A thick.

The substrate with the buffer layer is then heated to 1400° C. in the H₂ gas which is flowing at 1.4 liters per minute through the tube 12. At thermal equilibrium 1.2 milliliters per minute of C₃ H₈ and 0.6 milliliters per minute of SiH₄ are added to the flow of H₂. This mixture is maintained for 2 hours forming an 8 m thick cubic SiC layer. The C₃ H₈ and SiH₄ flow is the H₂ gas is discontinued and the Si substrate with a cubic SiC layer is quenched to room temperature in the H₂ gas. The Si may be melted at 1420° C. (SiC does not) or the Si may be dissolved in white etch (the SiC does not dissolve) in order to remove the SiC layer 18 from the Si layer 16 after completion of CVD.

Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein. 

What is claimed as new and desired to be secured by Letters Patent of the United States is:
 1. A method for producing large-area cubic SiC wafers comprising the steps of:wet-etching an Si substrate; heating the Si substrate to between 1370° C. and 1405° C. in H₂ gas; exposing the Si substrate to C₃ H₈ for 5-30 seconds, after temperature equilibrium in the heating step has been reached, to form a buffer layer of single crystal cubic SiC on the Si substrate, the amount of C₃ H₈ being no greater than 1% by volume of the H₂ gas; quenching to room temperature the Si substrate having a cubic SiC buffer layer in a gas of H₂ ; heating the Si substrate with the SiC buffer layer to between 1370° C. and 1405° C. in H₂ gas; exposing the Si substrate having the buffer layer to C₃ H₈ and SiH₄ after thermal equilibrium has been reached in the second heating step for 0.25 to 5 hours to make a thicker layer of cubic SiC, the amount of C₃ H₈ and SiH₄ each being no greater than 1% by volume of the H₂ gas; and quenching the Si substrate having the thicker layer of SiC in H₂ gas to room temperature.
 2. A method as described in claim 1 wherein the wet-etching step is carried out in a mixture of nitric, hydrofluoric and acetic acid in a volume ratio of 5:3:3, respectively.
 3. A method as described in claim 2 wherein after the wet-etching step, there is an additional step of placing the wet-etched Si substrate on a graphite susceptor inside an rf-induction heated quartz tube. 